GATE CSE 2011


Q41.

A layer-4 firewall (a device that can look at all protocol headers up to the transport layer) CANNOT
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Q42.

Consider the following circuit involving three D-type flip-flops used in a certain type of counter configuration. If all the flip-flops were reset to 0 at power on, what is the total number of distinct outputs (states) represented by PQR generated by the counter?
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Q43.

The minimum number of D flip-flops needed to design a mod-258 counter is
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Q44.

Consider the following circuit involving three D-type flip-flops used in a certain type of counter configuration. If at some instance prior to the occurrence of the clock edge, P. Q and R have a value 0, 1 and 0 respectively, what shall be the value of PQR after the clock edge?
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